/*
* Copyright (c) 2020 - 2024 Renesas Electronics Corporation and/or its affiliates
*
* SPDX-License-Identifier: BSD-3-Clause
*/

/**********************************************************************************************************************
 * File Name    : rspi_iobitmask.h
 * Version      : 1.00
 * Description  : IO bit mask file for rspi.
 *********************************************************************************************************************/

#ifndef RSPI_IOBITMASK_H
#define RSPI_IOBITMASK_H

#define R_RSPI0_SPCR_MODFEN_Msk      (0x04UL)
#define R_RSPI0_SPCR_MODFEN_Pos      (2UL)
#define R_RSPI0_SPCR_MSTR_Msk        (0x08UL)
#define R_RSPI0_SPCR_MSTR_Pos        (3UL)
#define R_RSPI0_SPCR_SPEIE_Msk       (0x10UL)
#define R_RSPI0_SPCR_SPEIE_Pos       (4UL)
#define R_RSPI0_SPCR_SPTIE_Msk       (0x20UL)
#define R_RSPI0_SPCR_SPTIE_Pos       (5UL)
#define R_RSPI0_SPCR_SPE_Msk         (0x40UL)
#define R_RSPI0_SPCR_SPE_Pos         (6UL)
#define R_RSPI0_SPCR_SPRIE_Msk       (0x80UL)
#define R_RSPI0_SPCR_SPRIE_Pos       (7UL)
#define R_RSPI0_SSLP_SSL0P_Msk       (0x01UL)
#define R_RSPI0_SSLP_SSL0P_Pos       (0UL)
#define R_RSPI0_SPPCR_SPLP_Msk       (0x01UL)
#define R_RSPI0_SPPCR_SPLP_Pos       (0UL)
#define R_RSPI0_SPPCR_MOIFV_Msk      (0x10UL)
#define R_RSPI0_SPPCR_MOIFV_Pos      (4UL)
#define R_RSPI0_SPPCR_MOIFE_Msk      (0x20UL)
#define R_RSPI0_SPPCR_MOIFE_Pos      (5UL)
#define R_RSPI0_SPSR_OVRF_Msk        (0x01UL)
#define R_RSPI0_SPSR_OVRF_Pos        (0UL)
#define R_RSPI0_SPSR_MODF_Msk        (0x04UL)
#define R_RSPI0_SPSR_MODF_Pos        (2UL)
#define R_RSPI0_SPSR_SPTEF_Msk       (0x20UL)
#define R_RSPI0_SPSR_SPTEF_Pos       (5UL)
#define R_RSPI0_SPSR_TEND_Msk        (0x40UL)
#define R_RSPI0_SPSR_TEND_Pos        (6UL)
#define R_RSPI0_SPSR_SPRF_Msk        (0x80UL)
#define R_RSPI0_SPSR_SPRF_Pos        (7UL)
#define R_RSPI0_SPDR_SPD_Msk         (0xFFFFFFFFUL)
#define R_RSPI0_SPDR_SPD_Pos         (0UL)
#define R_RSPI0_SPSCR_SPSLN_Msk      (0x03UL)
#define R_RSPI0_SPSCR_SPSLN_Pos      (0UL)
#define R_RSPI0_SPSSR_SPCP_Msk       (0x03UL)
#define R_RSPI0_SPSSR_SPCP_Pos       (0UL)
#define R_RSPI0_SPBR_SPR_Msk         (0xFFUL)
#define R_RSPI0_SPBR_SPR_Pos         (0UL)
#define R_RSPI0_SPDCR_SPLW_Msk       (0x60UL)
#define R_RSPI0_SPDCR_SPLW_Pos       (5UL)
#define R_RSPI0_SPDCR_TXDMY_Msk      (0x80UL)
#define R_RSPI0_SPDCR_TXDMY_Pos      (7UL)
#define R_RSPI0_SPCKD_SCKDL_Msk      (0x07UL)
#define R_RSPI0_SPCKD_SCKDL_Pos      (0UL)
#define R_RSPI0_SSLND_SLNDL_Msk      (0x07UL)
#define R_RSPI0_SSLND_SLNDL_Pos      (0UL)
#define R_RSPI0_SPND_SPNDL_Msk       (0x07UL)
#define R_RSPI0_SPND_SPNDL_Pos       (0UL)
#define R_RSPI0_SPCMD0_CPHA_Msk      (0x0001UL)
#define R_RSPI0_SPCMD0_CPHA_Pos      (0UL)
#define R_RSPI0_SPCMD0_CPOL_Msk      (0x0002UL)
#define R_RSPI0_SPCMD0_CPOL_Pos      (1UL)
#define R_RSPI0_SPCMD0_BRDV_Msk      (0x000CUL)
#define R_RSPI0_SPCMD0_BRDV_Pos      (2UL)
#define R_RSPI0_SPCMD0_SSLKP_Msk     (0x0080UL)
#define R_RSPI0_SPCMD0_SSLKP_Pos     (7UL)
#define R_RSPI0_SPCMD0_SPB_Msk       (0x0F00UL)
#define R_RSPI0_SPCMD0_SPB_Pos       (8UL)
#define R_RSPI0_SPCMD0_LSBF_Msk      (0x1000UL)
#define R_RSPI0_SPCMD0_LSBF_Pos      (12UL)
#define R_RSPI0_SPCMD0_SPNDEN_Msk    (0x2000UL)
#define R_RSPI0_SPCMD0_SPNDEN_Pos    (13UL)
#define R_RSPI0_SPCMD0_SLNDEN_Msk    (0x4000UL)
#define R_RSPI0_SPCMD0_SLNDEN_Pos    (14UL)
#define R_RSPI0_SPCMD0_SCKDEN_Msk    (0x8000UL)
#define R_RSPI0_SPCMD0_SCKDEN_Pos    (15UL)
#define R_RSPI0_SPCMD1_CPHA_Msk      (0x0001UL)
#define R_RSPI0_SPCMD1_CPHA_Pos      (0UL)
#define R_RSPI0_SPCMD1_CPOL_Msk      (0x0002UL)
#define R_RSPI0_SPCMD1_CPOL_Pos      (1UL)
#define R_RSPI0_SPCMD1_BRDV_Msk      (0x000CUL)
#define R_RSPI0_SPCMD1_BRDV_Pos      (2UL)
#define R_RSPI0_SPCMD1_SSLKP_Msk     (0x0080UL)
#define R_RSPI0_SPCMD1_SSLKP_Pos     (7UL)
#define R_RSPI0_SPCMD1_SPB_Msk       (0x0F00UL)
#define R_RSPI0_SPCMD1_SPB_Pos       (8UL)
#define R_RSPI0_SPCMD1_LSBF_Msk      (0x1000UL)
#define R_RSPI0_SPCMD1_LSBF_Pos      (12UL)
#define R_RSPI0_SPCMD1_SPNDEN_Msk    (0x2000UL)
#define R_RSPI0_SPCMD1_SPNDEN_Pos    (13UL)
#define R_RSPI0_SPCMD1_SLNDEN_Msk    (0x4000UL)
#define R_RSPI0_SPCMD1_SLNDEN_Pos    (14UL)
#define R_RSPI0_SPCMD1_SCKDEN_Msk    (0x8000UL)
#define R_RSPI0_SPCMD1_SCKDEN_Pos    (15UL)
#define R_RSPI0_SPCMD2_CPHA_Msk      (0x0001UL)
#define R_RSPI0_SPCMD2_CPHA_Pos      (0UL)
#define R_RSPI0_SPCMD2_CPOL_Msk      (0x0002UL)
#define R_RSPI0_SPCMD2_CPOL_Pos      (1UL)
#define R_RSPI0_SPCMD2_BRDV_Msk      (0x000CUL)
#define R_RSPI0_SPCMD2_BRDV_Pos      (2UL)
#define R_RSPI0_SPCMD2_SSLKP_Msk     (0x0080UL)
#define R_RSPI0_SPCMD2_SSLKP_Pos     (7UL)
#define R_RSPI0_SPCMD2_SPB_Msk       (0x0F00UL)
#define R_RSPI0_SPCMD2_SPB_Pos       (8UL)
#define R_RSPI0_SPCMD2_LSBF_Msk      (0x1000UL)
#define R_RSPI0_SPCMD2_LSBF_Pos      (12UL)
#define R_RSPI0_SPCMD2_SPNDEN_Msk    (0x2000UL)
#define R_RSPI0_SPCMD2_SPNDEN_Pos    (13UL)
#define R_RSPI0_SPCMD2_SLNDEN_Msk    (0x4000UL)
#define R_RSPI0_SPCMD2_SLNDEN_Pos    (14UL)
#define R_RSPI0_SPCMD2_SCKDEN_Msk    (0x8000UL)
#define R_RSPI0_SPCMD2_SCKDEN_Pos    (15UL)
#define R_RSPI0_SPCMD3_CPHA_Msk      (0x0001UL)
#define R_RSPI0_SPCMD3_CPHA_Pos      (0UL)
#define R_RSPI0_SPCMD3_CPOL_Msk      (0x0002UL)
#define R_RSPI0_SPCMD3_CPOL_Pos      (1UL)
#define R_RSPI0_SPCMD3_BRDV_Msk      (0x000CUL)
#define R_RSPI0_SPCMD3_BRDV_Pos      (2UL)
#define R_RSPI0_SPCMD3_SSLKP_Msk     (0x0080UL)
#define R_RSPI0_SPCMD3_SSLKP_Pos     (7UL)
#define R_RSPI0_SPCMD3_SPB_Msk       (0x0F00UL)
#define R_RSPI0_SPCMD3_SPB_Pos       (8UL)
#define R_RSPI0_SPCMD3_LSBF_Msk      (0x1000UL)
#define R_RSPI0_SPCMD3_LSBF_Pos      (12UL)
#define R_RSPI0_SPCMD3_SPNDEN_Msk    (0x2000UL)
#define R_RSPI0_SPCMD3_SPNDEN_Pos    (13UL)
#define R_RSPI0_SPCMD3_SLNDEN_Msk    (0x4000UL)
#define R_RSPI0_SPCMD3_SLNDEN_Pos    (14UL)
#define R_RSPI0_SPCMD3_SCKDEN_Msk    (0x8000UL)
#define R_RSPI0_SPCMD3_SCKDEN_Pos    (15UL)
#define R_RSPI0_SPBFCR_RXTRG_Msk     (0x07UL)
#define R_RSPI0_SPBFCR_RXTRG_Pos     (0UL)
#define R_RSPI0_SPBFCR_TXTRG_Msk     (0x30UL)
#define R_RSPI0_SPBFCR_TXTRG_Pos     (4UL)
#define R_RSPI0_SPBFCR_RXRST_Msk     (0x40UL)
#define R_RSPI0_SPBFCR_RXRST_Pos     (6UL)
#define R_RSPI0_SPBFCR_TXRST_Msk     (0x80UL)
#define R_RSPI0_SPBFCR_TXRST_Pos     (7UL)
#define R_RSPI0_SPBFDR_R_Msk         (0x003FUL)
#define R_RSPI0_SPBFDR_R_Pos         (0UL)
#define R_RSPI0_SPBFDR_T_Msk         (0x0F00UL)
#define R_RSPI0_SPBFDR_T_Pos         (8UL)

#endif                                 /* RSPI_IOBITMASK_H */
